Once the wavelength stopped moving, the question became where the next decade of transistor density would come from instead. The semiconductor industry answers it collectively, through imec, a research institute in Leuven whose contributors run the length of the supply chain – TSMC, Intel and Samsung alongside the toolmakers, ASML and LAM among them. Its published roadmap is the closest thing the industry has to a shared plan.
Five lanes
- The light
- One step, then flat. A single exposure resolves about 13 nm today; when the aperture widens from NA 0.33 to 0.55 the figure reaches roughly 8 nm, and it holds there for four consecutive nodes. The last column hedges on a 0.75 lens that does not exist.
- Stacking
- The transistor reinvents itself. The nanosheet gives way to the CFET, one device stacked directly on top of its complement; by the final column two finished wafers are bonded face to face.
- Power delivery
- Moves from the front of the wafer to the back. Optional at first, then mandatory once transistors stack – there is no room left on the front side for both signal and power.
- Resist
- New chemistry enters with the wider lens: metal-oxide resists, needed because a higher-aperture exposure delivers fewer photons per unit area and the chemistry has to compensate.
- The wavelength
- 13.5 nm, a flat line across the whole map. It never moves.
What the shape means
Read the lanes against each other and the roadmap makes a claim about the next decade: the light contributes one step, and everything else contributes continuously. Most of the density between here and 2038 is expected to come from device architecture, stacking, power routing and cell design – not from printing finer.
That is a change in kind, not degree. For sixty years the printing machine set the pace and the rest of the process followed. On this map the printing machine takes one step in twelve years and the rest of the process carries the roadmap.
Two things the map is not
It is a roadmap, not a schedule, and not the industry's behaviour. Node years shift; the 2026 edition places A14 near 2028, contacted poly pitch stopping at 42 nm at A10 in 2030, CFET from A7 around 2033 and A3 at 2038. Adoption is a separate question from insertion: TSMC is reported to have decided against High-NA for its 1.4-nm node even though the roadmap inserts the 0.55 lens at A14.
And three different nodes carry near-identical names – imec's roadmap A14, TSMC's A14 and Intel's 14A. The A14 on this map is imec's.